Various techniques are known for speeding up microprocessors. Among these speeding-up techniques, there is a technique called pipelining. Pipelining is a technique which divides the operation of an instruction into a plurality of stages and sequentially executes divisional parts from a stage to another to perform the instruction.
For example, a single instruction may be divided into four stages, namely, a fetch stage, an instruction decode stage, an execution stage and a write-back stage, and these stages are executed in one clock cycle. For the execution, different stages are executed in an overlapping manner. That is, while the instruction fetch of a single instruction is completed and its instruction decode is executed, the instruction fetch of the next instruction can be executed at the same time. By progressively processing instructions from one stage to another, instructions can be finished every clock cycle.
There is another known technique called "superscalar" for speeding up microprocessors. Superscalar is a technique where hardware from plurality of pipelines executes a plurality of instructions in parallel. When two pipelines are used, it is called two-way. When four pipelines are used, it is called four-way.
Superscalar uses one operating unit for one instruction. Let a processor include a first integer unit and a floating unit in its first pipeline, and a second integer unit and a load store unit in its second pipeline, for example. Assume here that the instruction fetch unit sent the first pipeline an instruction to use the first integer unit and the second pipeline an instruction to use the second integer unit. Then, operation is automatically executed by using the first integer unit and the second integer unit.
The conventional processor, however, cannot use the floating point unit in the first pipeline and the load store unit in the second pipeline while it uses the first integer unit and the second integer unit. That is, the conventional processor does not use its operating units efficiently. Thus, there is a desire for efficient use of various operating units in a processor and realization of a control method therefor.